During the second step, the simulator engine must parse the stanzas it receives from the GUI, construct the corresponding circuit and then simulate it. The two major C++ modules involved in this step are parser.cpp and rtcomp.cpp. The former module implements a class that provides support for reading the stanzas the simulator engine receives and then identifying the headers and the attribute/value lines in their bodies. This module makes heavy use of the second module, rtcomp.cpp, which stands for runtime component. This module implements a high-level component class which is built during runtime as the parser module interprets its input stream.
From a design perspective, a runtime component is a kind of component, so we derive the Runtime_Component class from the Component class, thereby enabling the Runtime_Component to inherit all the features of its base Component class. The Runtime_Component module extends the functionality of its base class by providing member functions which create the subcomponents and top-level ports which comprise the circuit to be simulated. In many cases, these member functions are simple wrappers around the port and component constructors themselves.
Continuing our example from the previous subsection, the stanzas shown
in Figure 5.8 are received by the parser of the
simulator engine. As the parser processes each of the stanza headers and
their respective bodies individually, it invokes the appropriate
methods of the Runtime_Component to create the necessary
entities of the circuit. First, the primary input and primary output
netlists of the circuit are constructed from the input and output
stanzas transmitted by the GUI. Internal netlists are similarly constructed.
For the input netlists, the input vectors of the input stanza body
are also parsed and placed in the input netlist wire queues.
Then, as the component
stanzas are read, the subcomponents comprising the circuit are created.
Note that the netlists are transferred to the simulator engine before
the components because the constructors for components accept, as
parameters, netlists.
Therefore, the netlists must be constructed before the subcomponents can
be built.
After construction of all the netlists and subcomponents, the simulate() message is sent to the runtime component by the main() program, thereby simulating the newly constructed runtime component. All the resultant output signals are collected from the output netlist wire queues which are then transmitted by the simulator engine to the GUI for visual presentation in the signal display window. The main() function of the simulator engine is presented in its entirety in Figure 5.9. The mechanism by which these output signals are gathered and transmitted back to the GUI is described in the next subsection.
Figure 5.9: The main() Function of the Simulator Module