The first step involves the GUI transmitting component and netlist protocols to the simulator engine. These protocols describe the structure and connectivity of the circuit to be simulated and also provide the simulator with the input signals to be fed into the circuit during simulation. The Tcl procedure responsible for extracting the circuit description is called simulate which resides in the module simulate.tcl. This procedure translates the component, netlist and input waveform information available on the workarea canvas and signal display window of the GUI into the component and netlist protocols described earlier. The stanzas comprising this protocol are then passed through the command pipeline opened by the simulate procedure and transmitted to the simulator engine.
For example, consider the circuit of Figure 5.6 and its corresponding input waveforms in Figure 5.7, both of which have been specified by an end user via the GUI. Note that the italic numbers in the circuit diagram represent the netlist numbers that identify the input, output and internal netlists connected to the component ports; they are presented as an aid to understanding the component protocol described below and do not appear to the end user on the GUI.
Figure 5.6: Example of a Circuit
Figure 5.7: Example of Input Signal Waveforms
The stanzas representing the components, and the input, output and internal netlists are coalesced into the stream of data presented in Figure 5.8. Note that only the input netlists actually have corresponding signal values; the output and internal netlists are represented only by their respective identifiers. These stanzas are then transmitted to the simulator engine through the command pipeline.
Figure: Protocol for the Circuit and Inputs
in Figure 5.6 and Figure 5.7