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Complementary MOS (CMOS) Technology

One of the most popular MOSFET technologies available today (and the only one freely available to Canadian Universities) is the complementary MOS, or CMOS, technology. This technology makes use of both P and N channel devices in the same substrate material. Such devices are extremely useful, since the same signal which turns on a transistor of one type is used to turn off a transistor of the other type. This allows the design of logic devices using only simple switches, without the need for a pull-up resistor. Figure gif shows a typical inverter implemented with this technology, together with its switch equivalent.

  
Figure:

Note that the substrate connections are explicitly shown for each transistor. The substrate for the N channel device is connected to ground, while that for the P-channel device is connected to the positive voltage supply. Figure gif shows a typical cross-section for a device similar to the inverter shown in Figure gif.

  
Figure:

The CMOS device eliminates many of the problems of the NMOS devices; it consumes no DC power (at least, for static logic) since there is never a purely resistive path to ground; also, the pull-up and pull-down resistances of the P- and N-channel transistors can be made equal, so the device has a symmetric output. Of course, the technology is inherently more complex than the NMOS technology, since two different types of transistors must be made on the same substrate. Figure gif shows a set of transient output characteristics for a typical CMOS inverter similar to that shown in Figure gif, implemented with the Northern Telecom CMOS3 technology. This technology is available to Canadian universities through the Canadian Microelectronics Corporation. (In this example, the NMOS pull-down transistor has the minimum channel length and width of 3 , while the PMOS pull-up transistor has a channel width of 6 . The output load for the inverter is another identical inverter, and the input is a pulse with a 0.5 ns. rise and fall time. The results were obtained from a SPICE simulation, with SPICE parameters obtained from CMC.)

  
Figure:



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Mon Mar 27 21:13:11 NST 1995