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Three-Input AND Gate

Next, a three-input AND gate will be built using two two-input AND gates, which were created previously, and a single wire that will connect the output of the first AND gate with the input of the second gate. Summarizing the fundamental components: there are three input ports, one output port, one wire and two two-input AND gates.

The class declaration follows:

class And3 : public Component
        And3(Connector &, Connector &, 
             Connector &, Connector &, 
             ckt_time = UNDEF_TIME, char* = "And3");
        Input   I1, I2, I3;
        Output  O1;
        Wire    w;
        And2    and2a, and2b;

The constructor now takes four connector objects since a three input AND gate has a total of four ports. As usual, the ports, wire and two-input AND gates are encapsulated in the private section of the class. The delay time of the three-input AND gate is defaulted to an undefined time because the delay of the gate actually depends upon the delay associated with the two two-input AND gates.

To define the constructor of the three-input AND gate, all the connector objects are connected with the ports accordingly; the wire is instantiated and the two two-input AND gates are constructed. The two inputs of the first two-input AND gate come from the first two input ports of the three-input AND gate, while its output is connected to the nested wire. The second two-input AND gate receives its first input from this wire and gets its second input from the third input port of the three-input AND gate. The output of this two-input AND gate is directed to the output port of the three-input AND gate.

And3::And3(Connector &ci1, Connector &ci2,
           Connector &ci3, Connector &co1, 
           ckt_time dly, char *name) :
        Component(dly, name),
        CONNECT(I1, ci1, "And3 I1"),
        CONNECT(I2, ci2, "And3 I2"),
        CONNECT(I3, ci3, "And3 I3"),
        CONNECT(O1, co1, "And3 O1"),
        w("And3 wire"),
        and2a(I1, I2, w, 1L, "and2a"),
        and2b(w, I3, O1, 1L, "and2b")
{ }

Figure 3.2 shows how all the elements of the circuit are connected when a three-input AND gate is instantiated using external wires. For clarity, the linked list pointers which link the three input ports together have been omitted.

Figure 3.2: Three-Input AND Gate with External Wires

Donald Craig
Sat Jul 13 16:02:11 NDT 1996