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00055 #ifndef ns_mac_tdma_h
00056 #define ns_mac_tdma_h
00057
00058
00059
00060
00061 #include "marshall.h"
00062 #include <delay.h>
00063 #include <connector.h>
00064 #include <packet.h>
00065 #include <random.h>
00066 #include <arp.h>
00067 #include <ll.h>
00068 #include <mac.h>
00069
00070 #define GET_ETHER_TYPE(x) GET2BYTE((x))
00071 #define SET_ETHER_TYPE(x,y) {u_int16_t t = (y); STORE2BYTE(x,&t);}
00072
00073
00074
00075
00076
00077
00078 #define DSSS_CWMin 31
00079 #define DSSS_CWMax 1023
00080 #define DSSS_SlotTime 0.000020 // 20us
00081 #define DSSS_CCATime 0.000015 // 15us
00082 #define DSSS_RxTxTurnaroundTime 0.000005 // 5us
00083 #define DSSS_SIFSTime 0.000010 // 10us
00084 #define DSSS_PreambleLength 144 // 144 bits
00085 #define DSSS_PLCPHeaderLength 48 // 48 bits
00086
00087 class PHY_MIB {
00088 public:
00089 u_int32_t CWMin;
00090 u_int32_t CWMax;
00091 double SlotTime;
00092 double CCATime;
00093 double RxTxTurnaroundTime;
00094 double SIFSTime;
00095 u_int32_t PreambleLength;
00096 u_int32_t PLCPHeaderLength;
00097 };
00098
00099
00100
00101
00102
00103
00104 #define MAC_ProtocolVersion 0x00
00105 #define MAC_Type_Data 0x02
00106 #define MAC_Subtype_Data 0x00
00107
00108
00109 #define MAC_TDMA_MAX_DATA_LEN 1500
00110
00111
00112 #define MAC_TDMA_SLOT_NUM 32
00113
00114
00115 #define SLOT_SCHE 0
00116 #define SLOT_SEND 1
00117 #define SLOT_RECV 2
00118 #define SLOT_BCAST 3
00119
00120
00121 #define NOTHING_TO_SEND -2
00122
00123 #define FIRST_ROUND -1
00124
00125
00126 #define ON 1
00127 #define OFF 0
00128
00129
00130 #define DATA_DURATION 5
00131
00132
00133 struct frame_control {
00134 u_char fc_subtype : 4;
00135 u_char fc_type : 2;
00136 u_char fc_protocol_version : 2;
00137
00138 u_char fc_order : 1;
00139 u_char fc_wep : 1;
00140 u_char fc_more_data : 1;
00141 u_char fc_pwr_mgt : 1;
00142 u_char fc_retry : 1;
00143 u_char fc_more_frag : 1;
00144 u_char fc_from_ds : 1;
00145 u_char fc_to_ds : 1;
00146 };
00147
00148 struct hdr_mac_tdma {
00149 struct frame_control dh_fc;
00150 u_int16_t dh_duration;
00151 u_char dh_da[ETHER_ADDR_LEN];
00152 u_char dh_sa[ETHER_ADDR_LEN];
00153 u_char dh_bssid[ETHER_ADDR_LEN];
00154 u_int16_t dh_scontrol;
00155 u_char dh_body[1];
00156 };
00157
00158 #define ETHER_HDR_LEN \
00159 ((phymib_->PreambleLength >> 3) + \
00160 (phymib_->PLCPHeaderLength >> 3) + \
00161 offsetof(struct hdr_mac_tdma, dh_body[0] ) + \
00162 ETHER_FCS_LEN)
00163
00164 #define DATA_Time(len) (8 * (len) / bandwidth_)
00165
00166
00167
00168
00169
00170 class Host {
00171 public:
00172 LIST_ENTRY(Host) link;
00173 u_int32_t index;
00174 u_int32_t seqno;
00175 };
00176
00177
00178 class MacTdma;
00179
00180 class MacTdmaTimer : public Handler {
00181 public:
00182 MacTdmaTimer(MacTdma* m, double s = 0) : mac(m) {
00183 busy_ = paused_ = 0; stime = rtime = 0.0; slottime_ = s;
00184 }
00185
00186 virtual void handle(Event *e) = 0;
00187
00188 virtual void start(Packet *p, double time);
00189 virtual void stop(Packet *p);
00190 virtual void pause(void) { assert(0); }
00191 virtual void resume(void) { assert(0); }
00192
00193 inline int busy(void) { return busy_; }
00194 inline int paused(void) { return paused_; }
00195 inline double slottime(void) { return slottime_; }
00196 inline double expire(void) {
00197 return ((stime + rtime) - Scheduler::instance().clock());
00198 }
00199
00200
00201 protected:
00202 MacTdma *mac;
00203 int busy_;
00204 int paused_;
00205 Event intr;
00206 double stime;
00207 double rtime;
00208 double slottime_;
00209 };
00210
00211
00212 class SlotTdmaTimer : public MacTdmaTimer {
00213 public:
00214 SlotTdmaTimer(MacTdma *m) : MacTdmaTimer(m) {}
00215 void handle(Event *e);
00216 };
00217
00218
00219 class RxPktTdmaTimer : public MacTdmaTimer {
00220 public:
00221 RxPktTdmaTimer(MacTdma *m) : MacTdmaTimer(m) {}
00222
00223 void handle(Event *e);
00224 };
00225
00226 class TxPktTdmaTimer : public MacTdmaTimer {
00227 public:
00228 TxPktTdmaTimer(MacTdma *m) : MacTdmaTimer(m) {}
00229
00230 void handle(Event *e);
00231 };
00232
00233
00234 class MacTdma : public Mac {
00235 friend class SlotTdmaTimer;
00236 friend class TxPktTdmaTimer;
00237 friend class RxPktTdmaTimer;
00238
00239 public:
00240 MacTdma(PHY_MIB* p);
00241 void recv(Packet *p, Handler *h);
00242 inline int hdr_dst(char* hdr, int dst = -2);
00243 inline int hdr_src(char* hdr, int src = -2);
00244 inline int hdr_type(char* hdr, u_int16_t type = 0);
00245
00246
00247 void slotHandler(Event *e);
00248 void recvHandler(Event *e);
00249 void sendHandler(Event *e);
00250
00251 protected:
00252 PHY_MIB *phymib_;
00253
00254
00255 int slot_packet_len_;
00256 int max_node_num_;
00257
00258 private:
00259 int command(int argc, const char*const* argv);
00260
00261
00262 void re_schedule();
00263 void makePreamble();
00264 void radioSwitch(int i);
00265
00266
00267 void sendUp(Packet* p);
00268 void sendDown(Packet* p);
00269
00270
00271 void recvDATA(Packet *p);
00272
00273 void send();
00274
00275 inline int is_idle(void);
00276
00277
00278 void trace_pkt(Packet *p);
00279 void dump(char* fname);
00280
00281 void mac_log(Packet *p) {
00282 logtarget_->recv(p, (Handler*) 0);
00283 }
00284
00285 inline double TX_Time(Packet *p) {
00286 double t = DATA_Time((HDR_CMN(p))->size());
00287
00288
00289 if(t < 0.0) {
00290 drop(p, "XXX");
00291 exit(1);
00292 }
00293 return t;
00294 }
00295
00296 inline u_int16_t usec(double t) {
00297 u_int16_t us = (u_int16_t)ceil(t *= 1e6);
00298 return us;
00299 };
00300
00301
00302 SlotTdmaTimer mhSlot_;
00303 TxPktTdmaTimer mhTxPkt_;
00304 RxPktTdmaTimer mhRxPkt_;
00305
00306
00307 MacState rx_state_;
00308 MacState tx_state_;
00309
00310
00311 int radio_active_;
00312
00313 int tx_active_;
00314
00315 NsObject* logtarget_;
00316
00317
00318
00319
00320
00321 static int max_slot_num_;
00322
00323
00324 static double slot_time_;
00325
00326
00327 static double start_time_;
00328
00329
00330 static int active_node_;
00331
00332 static int *tdma_schedule_;
00333 int slot_num_;
00334
00335 static int *tdma_preamble_;
00336
00337
00338 int slot_count_;
00339
00340
00341 static int tdma_ps_;
00342 static int tdma_pr_;
00343 };
00344
00345 double MacTdma::slot_time_ = 0;
00346 double MacTdma::start_time_ = 0;
00347 int MacTdma::active_node_ = 0;
00348 int MacTdma::max_slot_num_ = 0;
00349 int *MacTdma::tdma_schedule_ = NULL;
00350 int *MacTdma::tdma_preamble_ = NULL;
00351
00352 int MacTdma::tdma_ps_ = 0;
00353 int MacTdma::tdma_pr_ = 0;
00354
00355 #endif