Timed Petri nets in performance exploration of simultaneous multithreading

Zuberek, W.M.

in Petri Nets - Manufacturing and Computer Science, ed. P. Pawlewski, ch.13, pp.299-312, Intech 2012 (ISBN 979-953-51-0700-2).

Abstract:

The performance of simultaneously multithreaded processors is studied in order to determine how effective simultaneous multithreading can be. In particular, an indication is sought if simultaneous multithreading can overcome the out-of-order's "barrier" of the speedup (equal to 2). A timed Petri net model of multithreaded processors at the instruction execution level is developed, and performance results for this model are obtained by event-driven simulation of the developed model. Since the model is rather simple, simulation results are verified (with respect to accuracy) by state-space-based performance analysis (for those combinations of modeling parameters for which the state space remains reasonably small).

Keywords:

simultaneous multithreading, instruction issuing, pipelined processors, timed Petri nets, performance analysis, event-driven simulation.

References:

Available in pdf.