Approximate simulation of distributed-memory multithreaded multiprocessors

Zuberek, W.M.

Proc. 35-th Annual Simulation Symposium; San Diego, CA, 14-18 April 2002, pp.107-114.

Abstract:

The performance of modern computer systems is increasingly limited by long latencies of accesses to their memory systems. Instruction-level multithreading is a technique to tolerate long latencies of memory accesses by switching from one instruction thread to another. The paper shows that the simulation-based performance evaluation of distributed-memory multithreaded multiprocessor systems can be significantly simplified by using approximate models, composed of only a few processors, but with some parameters adjusted to represent the behavior of the original system.

Keywords:

Instruction-level multithreading, distributed-memory multiprocessor systems, discrete-event simulation.

References:

Available in pdf and postscript.