Department of Computer Science
Course: CS 3724
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Sequential Logic
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Programmable logic arrays (PLA's)
Sequential Logic Devices and State Machines
Subsections
Sequential Logic
The D Latch and the D flip-flop
The JK flip-flop
The T flip flop
Registers
Data registers:
Shift registers
Counters - weighted coding of binary numbers
Synchronous counters
State machines
The serial adder
A sequence detector
Structured implementation of state machines
State machine models
root
2003-02-12
